Lattice IP Cores / Reference Designs

Re-Usable, Fully Tested IP Modules

Intellectual Property - Lattice IP Cores and Reference Designs
Lattice‘s Intellectual Property – IP Core Program assists our customers‘ design efforts by providing pre-tested, reusable functions that can be easily plugged in, freeing the designer to focus on their unique system architecture. These IP blocks eliminate the need to “re-invent the wheel“ by providing many industry-standard functions, ranging from PCI to DDR to Ethernet and more. These proven IP Cores are optimized for Lattice device architectures, meaning that you are getting fast, small cores that utilize the latest Lattice architectures to their fullest.
Complementing the Lattice ispLeverCORE IP Cores are free reference designs that support a number of functions. These reference designs come with either source code or a netlist and are industry-standard functions that have been optimized to work on Lattice FPGAs and CPLDs.

Key Features and Benefits

• A Foundation of Ready Designs
• Parameterizable
• Free “no-risk” evaluations
• Easily integrated into VHDL or Verilog projects
• Standardized license agreement

High Coding Standards

• Reuse Methodology Manual
• Coded for compactness
• Coded for high performance
• Lattice device-specific coding
• Automated design rule checking

Fully Tested

• Code coverage analyzed
• Tested for routability and consistent performance
• Tested for compatibility on supported software including
  3^rd-party simulators and synthesis tools

Free Evaluation Packages for most ispLeverCORE products

• Data Sheet
• User’s Guide
• Model for Functional Simulation
• System-Level Testbench
• Netlist(s)
• Parameter Configuration File(s)
• Constraints or Preferences File(s)

Lattice IPexpress Software Tool

• Easy-to-use GUI for Parameter Selection
• Makes Lattice ispLeverCORE Products Easy-to-Use
• No-Risk, Free Trial Evaluations
• Complete On-line Help Documentation

Lattice IPexpress Software Tool

• Bus Interface Cores
• Communication Cores
• DSP Cores
• Basic Elements/Math Cores
• Processor, Controller & Peripheral Cores

See Lattice web page:
www.latticesemi.com for a complete
listing of all available IP-Cores

The LatticeMico8 is an 8-bit microcontroller optimized for Field Programmable Gate Arrays (FPGAs) from Lattice. The LatticeMico8 is licensed under a new open intellectual property (IP) core license, the first such license offered by any FPGA supplier. The LatticeMico8 development tools consist of a LatticeMico8 port of version 4.4.3 of the GNU Compiler Collection (GCC) and version 2.18 of GNU Binary Utilities (binutils – C-compiler, assembler, linker and more).

The LatticeMico32 is a 32-bit Harvard, RISC architecture “soft” microprocessor, available for free with an open IP core licensing agreement. The LatticeMico32 System is based on the Eclipse C/C++Development Tools (CDT) environment, which is an industry open-source development and application framework for building software.